The present invention relates to information recording and reproduction technology and in particular relates to techniques that are effective in application to data synchronization detection etc of reduced data in digital data recording/reproduction systems. In more detail, it relates to a data synchronization detection technique in which the information recording medium format efficiency is improved by improving data synchronization and detection performance without employing the conventional data synchronization signal pattern (that is “no Sync byte” or “Sync byte less”), by implementing data synchronization by means of the frequency of occurrence of a specified pattern in the reproduced data.
Conventional data synchronization detection is described below with reference to the drawings.
The conventional method is described taking a magnetic disc device as an example. FIG. 25 is an example of the recording format of a magnetic disc device. The data are recorded or reproduced in respect of the recording medium at each sector constituting a unit storage region. Each sector receptively contains a PLO_SYNC region 91 for pulling in a PLL (phase locked loop), a data synchronization signal 92 for detecting the start position of DATA 93 and obtaining a decoding timing signal of undulated code, DATA 93 of the data region in which data is actually recorded/reproduced, and, in addition, CRC or ECC 94 for error detection and/or correction. Between each sector, there is a GAP 95 constituting a pattern for correctly performing data identification of the final data bit and for absorbing the various delay times.
It is well known that accurate detection of the data synchronization signal 92 mentioned above is extremely important in subsequent code demodulation of DATA 93. That is, even if the data obtained by code demodulation in DATA 93 has an extraordinarily good number of errors, if an error is made in detection of the data synchronization signal 92, which is normally of the order of a few bytes, code demodulation of the subsequent DATA 93 amounting to a few tens to a few hundreds of bytes cannot be performed accurately. It is therefore extremely important to perform data synchronization correctly.
For example, Laid-open Japanese Patent Publication No. H. 10-255400 discloses an example of the construction of data synchronization signal detection means whereby correct data synchronization can be achieved even in the event of occurrence of the adverse phenomenon known as TA (Thermal Asperity), in which waveform fluctuation occurs in the data synchronization signal 92 due to generation of heat when the reproduction head collides with the magnetic recording medium. As an example of this format, in respect of FIG. 25, an arrangement is illustrated in which a second data synchronization signal is additionally provided between the above CRC or ECC 94 and GAP 95.
Specifically, in the prior art of the above publication, in the lead channel circuit, the input data passes through an amplifier and AGC circuit before being identified by data identification means such as an automatic equalization type priority detection circuit and is then supplied to an 8/9 decoder that performs code demodulation. If, because of TA as mentioned above, the first data synchronization signal 92 cannot be correctly identified, a second data synchronization signal is detected by looking up identified data stored in the memory from GAP 95; from this, the head position of the data is found, and data reproduction is performed by outputting the identified data stored in the memory to code demodulation means such as an 8/9 decoder.
Also, the specification of U.S. Pat. No. 5,844,920 discloses a method for performing data synchronization more reliably by providing data synchronization signals at a plurality of locations.